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Next:

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• Contents
• List of Tables
• Specifications
  • Package:
  • Front Panel
  • Memory and registers
  • Broadcast modes
  • Data Cycles
  • SS Responses
  • Parity:
  • Reset Bus:
  • START:
  • CPU:
  • SCANNER CSR's
  • CSR#0:
    • EPM
    • Reset
    • Bus Timeouts
    • SR
    • Bus Mastership
    • Hold GK
    • Single Cycle
    • Reset Bus (RB)
    • Run
    • Class N Broadcast
    • Trigger
    • Power Fault
  • CSR#8
  • I/O INTERRUPT AND ERROR HANDLER
  • I/O Interrupts:
  • ERRORS:
  • EXTENDED PROGRAM MEMORY
  • PSW FORMAT
    • INTRP
    • EXCP
    • T.O.
    • SS2-SS0
    • BRQ
    • EG
    • AS/AK
    • MS1-MS0
    • RDOT
    • WTOT
    • EXCP2, EXCP1
    • NPA
    • SMSK
    • OVMSK
    • ECC2, ECC1
  • IBM Instructions:
  • Program Execution
  • Instructions
  • Instruction Format
  • Register Operation
  • Immediate Operands
  • Storage Operands
  • Address Generation
  • Program Status Word
  • Instruction Execution
  • Branching
  • Data Format
  • Number Representation
  • Instructions
    • Add
    • Add Halfword
    • Add Logical
    • And
    • Branch and link
    • Branch on Condition
    • Branch on Count
    • Branch on Index Low or Equal
    • Compare
    • Compare Halfword
    • Compare Logical
    • Divide
    • exclusive OR
  • Insert Character
    • Load
    • Load Address
    • Load and test
    • Load Complement
    • Load Halfword
    • Load Multiple
    • Load Negative
    • Load Positive
    • Move
    • Multiply
    • Multiply Halfword
    • OR
    • Set program Mask
    • Shift Left Double
    • Shift Left Double Logical
    • Shift Left Single
    • Shift Left Single Logical
    • Shift Right Double
    • Shift Right Double Logical
    • Shift Right Single
    • Shift Right Single Logical
    • Store
    • Store Character
    • Store Halfword
    • Store Multiple
    • Subtract
    • Subtract halfword
    • Subtract Logical
    • Test Under Mask
  • TM Test under Mask
  • FASTBUS I/O:
  • FASTBUS I/O Instruction Format:
    • Primary Address
    • Secondary Address
    • Read Random
    • Read Secondary Address
    • Read Block
    • Read Block with a Word Count as a guard.
    • Read Block with a Word Count.
    • Write Random
    • Write Random Indirect
    • Write Block with a Word Count
    • Write Block with a Word Count, Non-Handshake
    • Secondary Address, Read Random
    • Secondary Address, Read Block.
    • Secondary Address, Read Block with a word count guard.
    • Secondary Address, Read Block with a word count.
    • Secondary Address, Write Random.
    • Secondary Address, Write Block with a word count.
    • Secondary Address, Write Random indirect.
    • Primary, Secondary Address, Read Random.
    • Primary, Secondary Address, Read Block
    • Primary, Secondary Address, Read Block with a word count guard.
    • Primary, Secondary Address, Read Block with a word count.
    • Primary, Secondary Address, Write Random.
    • Primary, Secondary Address, Write Block.
  • BLOCK TRANSFERS
    • Basic block transfer instructions
    • Block Transfer instructions terminating on SS=2
    • Block Transfer instructions terminating on SS=2 with a guard
    • Block transfer instructions with count
    • Block transfer write instructions
  • SSP-SPECIFIC NON-FASTBUS INSTRUCTIONS
    • Shift Right Logical Bytes
    • Shift Right 32 bits
    • Set System Mask
    • Load Processor Status Word
    • Write CSR#0
    • Write CSR#0
    • Read CSR#0
    • Load Masks
    • Load Program Counter
    • Branch and Link Masks
  • Notes on some IBM SSP instructions:
  • Read-Modify-Write FASTBUS Instructions
  • HARDWARE CONFIGUREABLE ITEMS
  • CPU Board Jumpers
  • Control Board Jumpers
  • Programmable Logic Devices
  • Other Components
• SSP Instructions (alphabetic order)
• Index
• About this document ...

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A.Daviel,TRIUMF