The first operand is shifted right the number of bits specified by the second-operand address. Bits 16-19 of the instruction are ignored.
The second-operand address is not used to address data; its low-order six bits indicate the number of bit positions to be shifted. The remainder of the address is ignored.
All 32 bits of the first operand participate in the shift. Low-order bits are shifted out without inspection and are lost. Zeros are supplied to the vacated high-order register positions.
Resulting Condition Code:
The code remains unchanged.