Bits 12-14 of the general register specified by the R1 field replace the condition code and the program mask bits of the current PSW. Other bits of the instruction are ignored.
The contents of the register specified by the. R1 field remain unchanged.
Resulting Condition Code:
The code is set according to bits 12 and 13 of the register specified
by R1.
Program Exceptions:
None
Programming Note
Bits 14-15 of the general register may have been loaded from the PSW by
BRANCH
AND LINK.