Next: 7.2.6 Internal Address Width
Up: 7.2 ADI Description
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The IGA bits are compared with the corresponding bits from the BB buffer.
This circuit is only used in the least significant chip. To conserve
pins the output of the geographic address check circuit is multiplexed onto
BGPC with
the carry-in signal for the NTA increment circuit (which is always high for
the least significant chip). It is also time-multiplexed with the parity
check signal. The carry information is only passed during an increment NTA
operation.
Next: 7.2.6 Internal Address Width
Up: 7.2 ADI Description
Previous: 7.2.4 User Data Buffer