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In applications having an on-board micro-processor it is convenient
to share the user address and data busses between the PCL/ADI and the
micro-processor. The PCL has arbitration
logic and control
lines to control access to these busses, and provide appropriate responses to
FASTBUS operations. Various methods of arbitration are possible and are
described in Section 11.6.
Next: 3 PCL SIGNAL SUMMARY
Up: 2 DESCRIPTION OF PCL
Previous: 2.4 TIMING CONTROL