Next: 2.4 TIMING CONTROL Up: 2 DESCRIPTION OF PCL Previous: 2.2 PRIMARY ADDRESS CONTROL

2.3 DATA CYCLE CONTROL

This performs transfers and provides responses for MS=0, 1, 2 and 3, and optionally Advanced Modes 4, 5, 6 and 7. The user provides signals to the PCL from an NTA decoder indicating the location and type of register addressed. SS responses are generated for indicated bad addresses, non-implemented MS codes and parity errors. The user may disable automatic SS code generation and/or provide an external SS code. The user may also indicate a busy condition (for SS=1) or bad data (for SS=7). Simple control signals for CSR#0 and user registers are provided.



Next: 2.4 TIMING CONTROL Up: 2 DESCRIPTION OF PCL Previous: 2.2 PRIMARY ADDRESS CONTROL


A.Daviel,TRIUMF