Data operations using Multiblock Mode are commenced by a Master addressing DSR#2 in the Primary Link. The Primary Link then responds to ensuing data cycles in Multiblock Mode, accessing data in its own DSR#1 until the end of DSR#1 is reached.
A Primary Link addressed at DSR#2 shall become active in
Multiblock Mode, accessing data associated with its DSR#1.
When an active Primary or Middle Link reaches the end of data
associated with DSR#1 it shall, at the next DS(t), remove any
signals it may have been asserting on AD, PE, PA or SS, and
assert WT=1 and TSO=1.
If an active Primary or Middle Link receives TKI=0 while
asserting TSO=0 it shall assert SS=3 and complete the operation.
When a Primary or Middle Link Slave operating in Multiblock
Mode reaches "end of block" it transfers a token to the next
Slave in the Multiblock group by asserting TS(u). It also asserts
WT=1 and ceases to assert data (AD=0, PE=0, PA=0, SS=0). The
timer in the Master is disabled by WT=1 thus allowing for any
extra response delay due to the transfer mechanism. DK
transitions are also inhibited by WT=1.
If a Primary or Middle Link receives TKI=0 before transferring access then an error condition exists which is signalled by the Link asserting SS=3 then DK(t). Either the Multiblock Group is not configured correctly, the A Daisy-Chain is broken or a Module has failed.
Upon receipt of TS(u) the next Link prepares itself to participate in ensuing data cycles, sets up to assert DK=DS, and then acknowledges receipt of the token by asserting TK(d). Receipt of TK(d) by the previously active Link causes it to assert WT=0 thus allowing data cycle associated with the newly active Link to take place.
At TSI(u) a Middle or End Link shall become active and
commence operating in Multiblock Mode, directly accessing data
associated with DSR#1 as defined by the Segment MS and RD
signals. When it is ready to proceed it shall assert TKO(d).
Upon the receipt of TKI(d) a Primary or Middle Link shall set
WT=0.
Note that the NTA register of a Middle or End Link is unaffected by operations in Multiblock Mode.
If the first data cycle for a Middle or End Link was initiated by DS(u) the previous Link is asserting DK=0, and the data cycle continues after WT(d) with the new Link asserting DK(u)
If the first data cycle for a Middle or End Link was initiated by DS(d) the previous Link is asserting DK=1. When the data cycle continues after WT(d), the previous Link sets DK=0 providing the strobe for the data transfer of the new Link. The previous Link takes no part in ensuing data cycles. DK(u) is asserted by the new Link.
When the End Link is empty it simply asserts SS=2 (buffer empty) and then DK(t).
Multiblock access is terminated if AS is de-asserted indicating that the Master has detached.
A Primary Link operating in Multiblock Mode shall at AS(d)
assert TSO=0.
A Middle Link operating in Multiblock Mode shall at AS(d)
assert WT=1 then TSO=0, TKO=TKI and remove all other signals
from the Segment. When it is ready to accept a Primary Address
operation is shall assert WT=0.
An End Link operating in Multiblock Mode shall at AS(d)
assert WT=1 then TSO=0, TKO=1 and remove all other signals
from the Segment. When it is ready to accept a Primary Address
operation is shall assert WT=0.
A Primary Link operating in Multiblock Mode responds to AS(d) in the same way as for normal FASTBUS operations. Since a Middle or End Link is unable to deter the next Primary Address operation by holding AK=1, it asserts Wait until internal activities have been completed
Multiblock Mode is terminated if the MS code changes to indicate a Secondary Address operation. The operation continues accessing only the Primary Link.
A Primary Link operating in Multiblock Mode shall on
recognition of a Secondary Address operation at DS(u) assert
TSO=0.
A Middle Link operating in Multiblock Mode shall on
recognition of a Secondary Address operation assert TSO=0,
TKO=TKI and remove all other signals from the Segment.
An End Link operating in Multiblock Mode shall on
recognition of a Secondary Address operation assert TSO=0,
TKO=1 and remove all other signals from the Segment.