Next: 9.3.2 Logical Addressing Up: 9.3 Primary Addressing Previous: 9.3 Primary Addressing

9.3.1 Geographic Addressing

Geographic Addressing mode is entered by generating a FASTBUS Primary Address where the upper 24 bits of the address are either zero or correspond to the Segment Group Address, and the lower 8 bits of the address match the GA lines for the slot into which the module is inserted, providing that EG is asserted correctly by the Ancillary Logic module.

In normal operation this is simply a matter of generating an address equal to the crate slot number.

CSR space is accessed by an FRC or FRCB operation. Dataspace is accessed by an FRD or FRDB operation.

See the FASTBUS specification section 4.2.



Next: 9.3.2 Logical Addressing Up: 9.3 Primary Addressing Previous: 9.3 Primary Addressing


A.Daviel,TRIUMF