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The base output from the CCD module with no input signal is composed of three
parts; a DC offset, a gradual slope due to leakage current in the CCD, and a
random patterning due to material and processing variations. A Pedestal FIFO
is provided on the compactor daughterboard which may be loaded with a unique
pedestal value for each bin.
The pedestal is programmable between 0 and 255 for each input bin, for each
channel. The pedestal value for each input data bin is subtracted from the
input data before further processing is done. There is no default value; the
pedestal must be explicitly loaded before the module is operated
The pedestal data may be obtained by averaging
several data sets taken with no input signal.
Figure 4 shows a typical scintillator pulse after digitization.
The first plot shows a portion of the raw digital data from the CCD board.
The second shows the corresponding CCD pedestal data, and the third plot
shows the resulting corrected data. The output data is not allowed to go
negative for the data that is below pedestal.
Next: 5.2 Threshold
Up: 5 Programmable Features
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