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11 Initial Checkout

The FASTBUS interface used in the module is fully-featured and is too complex to check out manually. However, some confidence may be gained by performing a few simple operations.

The following sequences are written in FOPS format. The first field is the short form of a simple FASTBUS transaction routine call, as defined in The FASTBUS specification IEEE Std 1177-1989. The second field is the Primary Address, either in hex or as a symbol. The third field is the Secondary Address. For a single data write, the fourth field is the data. For a single data read, it is the expected value of the data. For a block operation, it is the bytecount. and the data follows on succeeding lines. Any further fields are ignored. Anything following a semicolon is treated as a comment. The FASTBUS software environment is assumed to be in immediate mode.

The following assumes that the module is inserted into the crate in slot number DC, and that no FASTBUS operations have been performed since power-up.

; The yellow (Slave) LED should be extinguished.
; The green (Busy) LED should be extinguished.
; The red (Power Fault) LED should be extinguished. If it is lit, check
; all fuses and power supply voltages.

FRC DC 0 00450000        ; Module ID, no status bits set in CSR#0
FRC DC 7 0               ; CSR#7 is cleared on power up
FWC DC 3 12345678        ; write CSR#3
FRC DC 3 12345678        ; read back all bits
FWC DC 7 87654321        ; write CSR#7
FRC DC 7 00004321        ; read back lower 16 bits only
FWC DC 7 2               ; set Class 1
FWC DC 0 2               ; set enable bit
FRC DC 0 00450002        ; read back
; Check Logical addressing assuming module is in local crate
; If not, modify address to match route table entry.
FRC 12345678 0 00450002  ; Logical address, read CSR#0
FWC DC 0 00020000        ; clear enable bit
FRC DC 0 00450000        ; read CSR#0
FRCM 15 0 00450000       ; read CSR#0 with class N broadcast
FWC DC 0 40000000        ; write Reset bit
FRC DC 7 0               ; reset should clear CSR#7
FWC DC C0000002 12345678 ; write threshold channel 0
FRC DC C0000002 78       ; read back - 8 bits only
FRC DC C000000A 0        ; threshold for channel 1 should be zero after reset
FWC DC C0000082 57       ; threshold multiple write - all channels
FRC DC C0000002 57       ; read channel 0
FRC DC C000000A 57       ; read channel 1
FRC DC C0000012 57       ; read channel 2

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