Clusters of input data, which may represent one or more physical pulses, are
passed to an output buffer. Each cluster is followed by a 2-byte cluster
header, comprising the bin address and cluster length.
Following the last cluster header, a 4-byte channel header
is generated. This contains a word count, cluster count and channel
ID
. The Channel ID is a 4-bit number
between 0 and 15 corresponding to each input channel.
If the input data greater than or equal to threshold for one channel (after pedestal subtraction) consists of two clusters B and C, containing the data bytes B1, B2, C1, C2 ... C7, then the output buffer will contain data as shown in Table 16.
BH1,BH2 are the cluster header for cluster B,
CH1,CH2 are the cluster header for cluster C, and
H1 .. H4 is the channel header
(word aligned).
Zeroes are inserted after the last cluster header in order to word-align the channel header.
The first byte (BH1,CH1) is the bin address of the first byte of the respective cluster. The second byte of each cluster header (BH2, CH2) is the number of bytes in the cluster. This ordering is different from the Rev. 0 chips.
The first byte of the channel header (H1) contains a copy of the
status register at Offset = 4 (see Table 10). This includes the
channel ID in the lower 4 bits. The second byte (H2)
contains a copy of the status register at Offset = 3 (see Table 9).
The third byte
(H3) contains a word count (not byte count) for the channel,
and the fourth byte (H4) contains a cluster count
for the channel.