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vii Conclusions

The implementation of a relatively simple FASTBUS slave using the PCL and ADIs was straightforward and presented few problems in debugging. No errors were found in the PCL design.

A mask-programmable gate array is a viable solution to data-acquisition design problems for medium to large quantities. In the quantity designed for here (1000), the engineering costs of the array formed a significant part of the total cost and put some pressure on the designer to get it right the first time. System simulation on a CAD system is essential for this kind of design.

Next: viii Acknowledgements Up: A 30MHz FASTBUS Previous: vi Performance